Control of a MOS transistor as a rectifying element

ABSTRACT

A circuit for controlling a switch to be controlled in unidirectional fashion while the voltage present there across is an A.C. voltage, including circuitry for delaying the switch turning-on with respect to a zero crossing of the voltage there across, and circuitry for triggering the switch turning-off after its turning on, at the end of a predetermined time interval plus or minus an error time controlled by the duty cycle of the A.C. voltage across the switch, in one or several previous periods. The control circuit applies to the forming of a rectifying circuit by the switch.

BACKGROUND OF THE INVENTION

1. Field on the Invention

The present invention relates to A.C. voltage rectifying elements. Thepresent invention more specifically relates to the implementation of arectifying function (diode) by means of a MOS transistor.

2. Discussion of the Related Art

FIG. 1 very schematically shows a first example of a circuit usingrectifying elements of the type to which the present invention mayapply. In this example, it is a so-called forward-type converter. Such aconverter is essentially formed of a transformer T having a primarywinding T1 receiving a D.C. voltage provided by a capacitor C1 connectedto the output of a diode bridge B supplied with an A.C. voltage. WindingT1 is grounded by a switch K. Switch K is controlled in pulse-widthmodulation by a PWM signal (high-frequency with respect to the A.C.power supply) set to regulate a D.C. voltage Vout provided by theconverter. Voltage Vout is provided on the secondary side T2 across acapacitor C2 storing the power transferred from primary T1 to secondaryT2 of the transformer during periods when switch K is on. A first end ofsecondary winding T2 is connected, by a diode D1 in series with aninductance L1, to a first electrode of capacitor C2 defining a positiveoutput terminal, while its other end is directly connected to the otherelectrode of capacitor C2 defining ground M2 on the side of voltageVout. A free wheel diode D2 connects the junction point of diode D1 andof inductance L1 to ground M2, the anode of the diode being on theground side. The operation of such a converter is known.

The rectifying elements are here formed of diodes D1 and D2 which havethe disadvantage of exhibiting a threshold voltage on the order of from0.3 to 1.5 volts, which adversely affects the converter operation,especially in low-voltage applications.

FIG. 2 partially and schematically illustrates a modification applied toa PWM converter of FIG. 1 to decrease the threshold voltage of therectifying elements. In FIG. 2, only a portion of the secondary has beenshown, the rest being similar to FIG. 1. To decrease the thresholdvoltage of diodes D1 and D2, said diodes are replaced with two N-channelMOS transistors N1 and N2 which are adequately controlled by a specificcircuit CTRL. For voltage reference reasons, transistor N1 replacingdiode D1 must however be placed on the ground branch of the converter,while transistor N2 can be placed in the same way as diode D2 of FIG. 1.Control circuit CTRL further receives a supply voltage SUPPLY as well asa signal SYNCH of synchronization with respect to the switching of theD.C. voltage performed on the primary side, to synchronize therespective turn-off and turn-on times of transistors N1 and N2 with theturn-off and turn-on times of switch K (not shown in FIG. 2).

A disadvantage of the synchronous rectifying circuit of FIG. 2 is thattransistors N1 and N2 cannot have an autonomous operation. They need asynchronization signal coming from the primary as well as a supplyvoltage.

Another disadvantage is the presence of a MOS transistor on the groundline and not on the high line on the secondary side.

FIG. 3 illustrates another example of a voltage converter to which thepresent invention applies. It is a D.C./D.C. converter having thefunction of raising an output voltage Vout with respect to the level ofan input voltage V1 provided, for example, by a battery. The positiveelectrode of battery V1 is connected to a first end of an inductance Lhaving its other end connected, by a first MOS transistor N1, to a firstelectrode of an output capacitor across which is sampled output voltageVout. The junction point of inductance L and of transistor N1 is furtherconnected, by a transistor N2, to the ground defined by the negativeelectrode of battery V1 to which the second electrode of capacitor C isconnected. In such an application, the control of transistors N1 and N2is particularly difficult since it requires a level shifter to controltransistor N1 which has no ground reference.

It would be desirable to have a rectifying element with a low thresholdvoltage, which does not pose the problems of MOS transistor control inconventional configurations.

SUMMARY OF THE INVENTION

The present invention aims at providing a circuit of autonomous controlof a MOS transistor ensuring a rectifying function.

The present invention also aims at providing an autonomous rectifyingelement, that is, with two terminals, comprising a MOS transistor andits control circuit.

To achieve these and other objects, the present invention provides acircuit for controlling a switch to be controlled in unidirectionalfashion while the voltage present there across is an A.C. voltage,comprising:

-   -   means for delaying the switch turning-on with respect to a zero        crossing of the voltage there across; and    -   means for triggering the switch turning-off after its turning        on, at the end of a predetermined time interval plus or minus an        error time controlled by the duty cycle of the A.C. voltage        across the switch, in one or several previous periods.

According to an embodiment of the present invention, said predeterminedduration is selected according to the maximum expected variations of theduty cycle.

According to an embodiment of the present invention, a capacitor and adiode are series-connected between the terminals of the switch toprovide a supply voltage to the control circuit, the capacitor beingcharged when the switch is off.

According to an embodiment of the present invention, the control circuitcomprises:

-   -   a circuit for detecting the sign of the voltage across the        capacitor;    -   a ramp generator reset on each sign switching of the voltage        across the switch in a direction in which it must become        conductive, said generator being controlled by the detection        circuit;    -   a means for causing the turning-on of the switch after detection        of a sign switching of the voltage there across; and    -   a circuit for controlling the duration of the on state with a        predetermined value.

According to an embodiment of the present invention, a first delayelement brings a minimum delay to a turn-off order of the switch whichfollows its turning-on.

According to an embodiment of the present invention, a second delayelement brings a delay to the turning-on of the switch with respect tothe inversion of the voltage there across.

According to an embodiment of the present invention, an output amplifierproviding the control signal of the switch is controlled by means fordetecting an inversion of the voltage direction, to cause theturning-off of the switch in case of an incidental voltage inversion.

According to an embodiment of the present invention, the switch is a MOStransistor.

According to an embodiment of the present invention, a diode in parallelon the switch is used for the starting.

The present invention also provides a rectifying circuit with a lowthreshold voltage comprising a switch in parallel with a diodepreferably formed of its parasitic diode, and a control circuitassociated with a supply circuit drawing its power supply directly fromacross the controlled transistor when said transistor is on.

According to an embodiment of the present invention, the rectifyingcircuit exclusively comprises two external connection terminals.

The foregoing objects, features, and advantages of the present inventionwill be discussed in detail in the following non-limiting description ofspecific embodiments in connection with the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1 to 3, previously described, illustrate conventional examples ofa rectifying element assembly to which the present invention applies;

FIG. 4 very schematically shows an embodiment of a rectifying circuitbased on MOS transistors according to the present invention;

FIGS. 5A and 5B illustrate, in timing diagrams, the operation of thecircuit of FIG. 4;

FIG. 6 shows an embodiment of a circuit for controlling a MOS transistorassembled as a rectifying element according to the present invention;

FIGS. 7A to 7H illustrate, in the form of timing diagrams, the operationof the circuit of FIG. 6; and

FIG. 8 shows an alternative control circuit according to the presentinvention, comprising optional protection devices.

DETAILED DESCRIPTION

The same elements have been designated with the same reference numeralsin the different drawings. For clarity, only those elements which arenecessary to the understanding of the present invention have been shownin the drawings and will be described hereafter. In particular, not allthe possible applications of an autonomous rectifying circuit accordingto the present invention have been shown, the present inventiongenerally applying to the replacing of a diode in a rectifying functionwith a MOS transistor and its control circuit.

A feature of the present invention is to control a MOS transistor havingits drain and its source defining two end terminals of the rectifyingcircuit, by synchronizing its on periods exclusively according to thevoltage present there across (between its drain and its source).

Preferably, the control circuit is autonomous, that is, it draws thepower necessary to its operation from across the MOS transistor.

The present invention thus implements a diode function by means of anautonomous circuit exclusively having two terminals to be connected tothe rest of the application.

FIG. 4 schematically shows, in the form of blocks, a rectifying circuitwith a MOS transistor according to the present invention. This circuitessentially comprises an N-channel MOS transistor 1 having its sourcedefining anode A of the rectifying circuit and having its drain definingcathode K thereof. A diode 2 is connected in parallel on transistor 1with its anode confounded with the source of transistor 1. In practice,diode 2 may be formed by the parasitic diode of transistor 1.

According to the present invention, the gate of transistor 1 receives acontrol voltage Vc provided by a circuit 3 (CT) which sets theconduction periods of transistor 1 according to the voltage sensed thereacross. For this purpose, circuit 3 comprises two terminals respectivelyconnected to electrodes K and A. Circuit 3 is further autonomouslysupplied with a voltage Vcc directly extracted from the voltage betweenterminals K and A. In the example of FIG. 4, the supply circuit isformed of a diode 4 having its anode connected to cathode K of thecircuit and having its cathode connected, by a storage capacitor 5, toanode A. Voltage Vcc intended for circuit 3 is sampled across capacitor5. This embodiment is a simplified embodiment, improved versions ofwhich will be discussed hereafter.

According to the present invention, the halfwaves during whichtransistor 1 is off due to a positive voltage Vd between its terminals Kand A (with the conventions chosen in the drawings) are used to chargecapacitor 5, diode 4 being forward biased during these periods. Duringhalfwaves when voltage Vd is negative, transistor 1 is turned on bycircuit 3 and diode 4 prevents capacitor 5 from discharging other thanby supplying circuit 3.

It can thus be seen that the present invention performs a rectifyingfunction in the case where the voltage present between terminals K and Ais a voltage which switches directions, that is, which comes from anA.C. source. More specifically, the present invention applies to thecase where voltage Vd is of relatively high voltage switched-mode type(several tens of kilohertz) to avoid requiring a capacitor 5 having toolarge a size, said capacitor indeed having to maintain a sufficientcharge during periods when transistor 1 conducts.

Of course, the voltage Vcc necessary to the operation of circuit 3 maybe provided by other means, especially for the case where an adequatevoltage is available in the rest of the circuit. However, the obtainingof voltage Vcc directly by the voltage across the circuit of the presentinvention is preferably, since this provides a completely autonomouscircuit with no voltage reference problem.

FIGS. 5A and 5B respectively illustrate, in the form of timing diagrams,an example of the shape of voltage Vd across transistor 1 and of thecorresponding control voltage Vc provided by circuit 3.

As long as capacitor 5 is discharged (system starting), transistor 1 isoff whatever voltage Vd (circuit 3 is not supplied and thus cannotensure the control). A possible conduction during periods when thevoltage of terminal A is greater than the voltage of terminal K(negative voltage Vd with the conventions of the drawings) is thenensured by diode 2, which is then forward biased. A few halfwaves ofvoltage Vd may be necessary to sufficiently charge capacitor 5 andenable starting of the system.

FIGS. 5A and 5B illustrate an example in steady state and, forsimplification, assume a rectangular voltage Vd (for example,originating from a switched-mode power supply). All that will bediscussed hereafter also applies in the case of a voltage Vd of sine orother shape, provided that it is an A.C. voltage.

During periods or halfwaves where voltage Vd across transistor 1 ispositive, said transistor is off (Vc=0). Capacitor 5 charges duringthese periods.

At a time t1 when voltage Vd nulls out (change of halfwave towards anegative halfwave), the reverse voltage (negative voltage in theorientation of the drawing) is first limited to a first threshold TH1corresponding to the threshold voltage (on the order of 0.7 volt) ofdiode 2. Indeed, as soon as voltage Vd reaches this negative value,diode 2 conducts and introduces a forward voltage drop of value TH1.Circuit 3 is designed to detect the occurrence of this negative voltageand to cause the turning-on of transistor 1 at a time t2 following timet1 with a predetermined duration. At time t2, transistor 1 is turned on,which reduces the forward voltage drop to threshold voltage TH2 of thistransistor. In practice, this voltage drop is, at worst, smaller than0.2 and can even be reduced to approximately 50 mV. It is linked to theon-state resistance of the MOS transistor (RdsON) and thus depends onthe current set by the application. It also depends on the transistorsize and on the avalanche voltage of the technology.

The turning-off of transistor 1 must occur at a time t3 coming before atime (in principle, unknown) t4 of halfwave change (transition to thenew positive halfwave).

According to the present invention, advantage is taken from the factthat the duty cycle variations of voltage Vd are generally small fromone period to the other to predict halfwave change time t4 with respectto the previous period P of voltage Vd. In fact, circuit 3 determines anon duration (t3−t2) with respect to the preceding period of voltage Vd.Time interval Δt=t4−t3 is controlled by circuit 3 on a duty cycle changeto be maintained at a predetermined value chosen according to themaximum expected extent of the duty cycle variations from one period toanother in the considered application.

The turning-off of transistor 1 in advance with respect to theoccurrence of the positive halfwave is indispensable to avoid conductionof the system during this positive halfwave, which would cancel thedesired rectifying effect. However, upon turning-on of the transistor(time t2), the lag time (interval between times t1 and t2) may beeliminated if the application allows turning on as soon as the negativehalfwave begins.

Several means may be envisaged to control time interval Δt on apredetermined minimum value to delay time t3 in case of an increase inperiod P of voltage Vd or conversely to advance time t3 in case of ashortening of period P, taking into account at least one previousperiod.

FIG. 6 shows the diagram of an example of the forming of a circuit 3according to the present invention implementing these functions. Itshows, again, transistor 1 to be controlled, as well as diode 2 inparallel. To simplify the discussion, the means for providing supplyvoltage Vcc have not been shown in FIG. 6. They are, for example,constituted by diode 4 and of capacitor 5 as in FIG. 4.

FIGS. 7A to 7H will be described together with FIG. 6, the operation ofwhich they explain in timing diagrams showing examples of shapes atcharacteristic points of the circuit.

As discussed previously, the circuit operation is conditioned by thedisappearing of voltage Vd or more specifically the switching from apositive to a negative halfwave of this voltage Vd (FIG. 7A, time t1)with the direction conventions of the drawings.

The detection of the direction of voltage Vd is performed by means of aresistive dividing bridge R1-R2 connected between terminals K and A, andhaving its midpoint connected to the input of an inverter 10. Inverter10 is used to put in digital form the detection signal. Voltage V10(FIG. 7B) at the output of inverter 10 is at a positive level (state 1substantially corresponding to supply voltage Vcc of the inverter) fromtime t1 and for the entire duration of the negative halfwave of voltageVd, that is, until time t4.

The output of inverter 10 drives a differentiator 11 (for example, aresistive and capacitive cell RC) having its output connected to thebase of an NPN-type bipolar transistor (or an equivalent means) havingthe function of short-circuiting a capacitor 13 otherwise receiving acurrent from a current source 14 drawing its power from power supplyVcc. The emitter of transistor 12 is connected to terminal A while itscollector is connected to the junction point of source 14 and ofcapacitor 13. Signal V11 (FIG. 7C) at the output of the differentiatorexhibits a pulse of short duration at each time t1 when voltage Vddisappears. This pulse turns on transistor 12, which dischargescapacitor 13 (voltage V13, FIG. 7D). From time t5 when the control oftransistor 12 disappears, the charge of capacitor 13 by constant currentsource 14 starts again. The interval between times t1 and t5, set by thetime constant of differentiator 11, is chosen to be as small aspossible. A sawtooth signal with a period P is thus generated(neglecting pulse t5−t1).

Voltage V13 is applied to the inverting input of an operationalamplifier 15. The output of amplifier 15 is sent to the input of twotiming elements (for example, delay lines) 16 and 17 introducingrespective predetermined delays td1 and td2. Output V15 (FIG. 7E) ofamplifier 15 switches high at time t1 when the voltage of its invertinginput disappears. FIG. 7F illustrates the shape of voltage V16 at theoutput of delay element 16. Arbitrarily, it has been assumed in thisexample that delay td1 is greater than delay td2. It should however benoted that these delays need not be linked to each other. Delay td1corresponds to the minimum predetermined time interval between times t3and t4 while delay td2 corresponds to the predetermined turn-on delay ofswitch 1 (interval between times t1 and t2).

In the example of FIG. 6, it is assumed that delay element 16 only actson the falling edges of signal V15 and introduces no delay on the risingedges. Similarly, it is assumed that delay element 17 only acts on therising edges of signal V15. Such assumptions are coherent since timestd1 and td2 are in practice negligible as compared to the switchingperiod.

FIG. 7G illustrates the shape of voltage Vc which corresponds to theoutput of element 17. Optionally, a buffer or level-adapting amplifier18 is provided between the output of element 17 and the gate oftransistor 1. Amplifier 18 then is, preferably, controllable as will besubsequently described in relation with FIG. 8.

The output of element 16 is combined in a gate of X-OR type 19 with thestate detected by inverter 10 (signal VI 0). FIG. 7H illustrates theresult of this combination (signal V19), which crosses an integrator 20before being looped back on the non-inverting input of amplifier 15. Thevalue of the error provided by integrator 20 is visible in FIG. 7D(level V20) and the time when the ramp of signal V13 reaches value V20corresponds to time t3 when interval td1 starts being down counted byelement 16.

This amounts to adding, to duration td1, a variable time ter which tendstowards 0 by the closed-loop control. Time ter corresponds to thecontrol error, the integral of which is multiplied by a coefficient E byintegrator 20. This approximately corresponds to a first order linearsystem. The larger constant E, the faster a variation of the duty cycleis recovered. There theoretically is no limit to value E, except forpossible saturation or the like problems.

In FIG. 7, the case where error ter nulls out on the second period isconsidered. The interval between times t3 and t4 then corresponds toconstant td1. Of course, in practice, duration ter tends towards zerobut is never really zero.

Preferably, the possible variation of duration ter is limited toconstant td1 to avoid, when error ter subtracts to constant td1, fortransistor 1 to be conductive while voltage Vd is positive.

An advantage of the present invention is that the transistor controlcircuit is completely autonomous and requires no fixed voltage reference(for example, the ground) for the circuit to which the rectifyingelement is connected. The only constraint is that, to enable its supply(provision of voltage Vcc) and a proper operation, the signal appliedacross transistor 1 must effectively be an A.C. signal.

FIG. 8 partially shows additional elements of the circuit of FIGS. 4 and6 according to a preferred embodiment of the present invention. Circuit3 of FIG. 8 comprises the elements described in relation with FIG. 6,only controllable buffer 18 of which has been shown.

According to this embodiment, circuit 18 is controlled (activated ordeactivated) to block the control signal of transistor 1 under theeffect of an RS-type flip-flop 30. The input for setting to 1 (S) offlip-flop 30 is connected, by an inverter 31, to cathode K and its inputfor resetting to 0 (R) is connected to the output of an operationalamplifier 32. The respective inverting and non-inverting inputs ofamplifier 32 are connected to terminals K and A. The function of such anassembly is to turn off the MOS transistor if, incidentally, the voltagebetween terminals K and A inverts during a negative halfwave. Indeed, assoon as voltage Vd becomes positive, the output of amplifier 22 switcheshigh, which turns off amplifier 18.

However, at each falling edge of voltage Vd, signal S switches to state1, which activates amplifier 18.

FIG. 18 illustrates another alternative concerning the supply circuit.The case in point is to insert a resistor R between diode 4 andcapacitor 5. This resistor R enables the charge current of capacitor 5to be of leakage current type while it is of recovery current type inthe absence of resistor R. The voltage provided by capacitor 5 may beregulated by a circuit 33 (REG) before providing voltage Vcc to block 3.

An advantage of the present invention is that it provides aunidirectional autonomous circuit likely to replace a diode in manyapplications. Further, the present invention enables replacing atransistor in a synchronous operation since the circuit performs anautomated synchronization with respect to the voltage present betweenterminals A and K. In this type of application, the present inventionenables preserving the switch position on the positive line (converselyto FIG. 2 where transistor N1 is on the ground line). It is thus avoidedto cut the ground line, which considerably improves the fulfilling ofelectromagnetic constraints.

Another advantage of the present invention is that (except for shortswitching times (durations td2 and td1+ter)), the series voltage drop ofthe rectifying element of the present invention corresponds to that of aMOS transistor and is thus considerably smaller than that of a diode.

Of course, the present invention is likely to have various alterations,modifications, and improvements which will readily occur to thoseskilled in the art. In particular, other circuits than those illustratedin relation with FIG. 6 may be used to perform the functions ofintroducing a predetermined turn-on delay and a variable turn-off delayfor the MOS transistor. Similarly, in an implementation of the type ofthat of FIG. 6, the logic states selected for the operation of circuit 3are arbitrary, provided that the level of signal Vc is compatible withthe control of transistor 1.

Further, the connection of a rectifying circuit according to the presentinvention in a conventional converter is within the abilities of thoseskilled in the art based on the functional indications given hereabove.

Moreover, although the use of a MOS transistor is preferred, otherswitches can be envisaged. For example, a bipolar transistor may beused, with the provision of a current control and an oversizing ofsystem supply capacitor 5.

Such alterations, modifications, and improvements are intended to bepart of this disclosure, and are intended to be within the spirit andthe scope of the present invention. Accordingly, the foregoingdescription is by way of example only and is not intended to belimiting. The present invention is limited only as defined in thefollowing claims and the equivalents thereto.

1. A circuit for controlling a switch to be controlled in aunidirectional fashion while the voltage present there across is an A.C.voltage, comprising: means for delaying the switch turning-on withrespect to a zero crossing of the voltage there across; and means fortriggering the switch turning-off after its turning on, at the end of apredetermined time interval plus or minus an error time controlled bythe duty cycle of the A.C. voltage across the switch, in one or severalprevious periods.
 2. The circuit of claim 1, wherein said predeterminedduration is selected according to the maximum expected variations of theduty cycle.
 3. The circuit of claim 1, wherein a capacitor and a diodeare series-connected between the terminals of the switch to provide asupply voltage to the control circuit, the capacitor being charged whenthe switch is off.
 4. The circuit of claim 1, comprising: a circuit fordetecting the sign of the voltage across the capacitor; a ramp generatorreset on each sign switching of the voltage across the switch in adirection in which it must become conductive, said generator beingcontrolled by the detection circuit; a means for causing the turning-onof the switch after detection of a sign switching of the voltage thereacross; and a circuit for controlling the duration of the on state witha predetermined value.
 5. The circuit of claim 4, wherein a first delayelement brings a minimum delay to a turn-off order of the switch whichfollows its turning-on.
 6. The circuit of claim 5, wherein a seconddelay element brings a delay to the turning-on of the switch withrespect to the inversion of the voltage there across.
 7. The circuit ofclaim 1, wherein an output amplifier providing the control signal of theswitch is controlled by means for detecting an inversion of the voltagedirection, to cause the turning-off of the switch in case of anincidental voltage inversion.
 8. The circuit of claim 1, wherein theswitch is a MOS transistor.
 9. The circuit of claim 1, wherein a diodein parallel on the switch is used for the starting.
 10. A rectifyingcircuit with a low threshold voltage comprising a switch in parallelwith a diode preferably formed of its parasitic diode, and the controlcircuit of claim 1 associated with a supply circuit drawing its powersupply directly from across the controlled transistor when saidtransistor is on.
 11. The circuit of claim 10, exclusively comprisingtwo external connection terminals.